Binary Logic Values are:
• Logic ‘1’
• Logic ‘0’
• Undefined value
Positive and Negative LogicTTL Logic Levels
• Logic ‘1’ - VH
5V£ VH £2.4V
• Logic ‘0’ threshold - VL
0.4 V£ VL £0V
• Undefined
0.4 V < V < 2.4 V
Logic families are classified based on
• Devices Used
example: diodes ,transistors etc.
• Structure of Digital Circuits
example: ECL ,Wired logic etc.Examples of logic families are:
• DTL :Diode Transistor Logic
• RTL :Resistor Transistor Logic
• TTL :Transistor Transistor Logic
• ECL :Emitter Coupled Logic
• CMOS :Complementary MOSFET Logic
Logic families differ in:
• Driving Capabilities
• Logic Levels
• Propagation Delays
• Other Parameters
Comparison of TTL and CMOS
Levels of integration are
• SSI -small scale integration
• MSI -medium scale integration
• LSI -large scale integration
• VLSI -very large scale
integration
• ULSI -ultra large scale
integration
• GSI -giant scale integration
Output switching times:
• tLH- low to high rise time (tr)
Time interval between 10% to 90%
of Vdd
• tHL- high to low time or fall
time (tf)
Time for signal to fall from
90%Vdd to 10%Vdd
• Switching is fast with
tmin=thl+tlh
• Max switching freq is given by
fmax=1/tmin
• Eg: thl =0.5 nsec, tlh=1.0 nsec
tmin =1.5 nsec
fmax=1/ tmin=666.67Mhz
Propagation delay:
It is the physical delay as the logical signal
propagates through the gates.
• Fan-out of a gate is the number
of gates driven by that gate i.e the maximum
number of gates (load ) that can
exist without impairing the normal operation of
the gate.
• Fan-in of a gate is the number
of inputs that can be connected to it without
impairing the normal operation of the gate.
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